[Ground-station] Fwd: Thank You For Attending RISC-V Forum: Developer Tools & Tool Chains 2021!

Sun Jun 6 06:24:07 PDT 2021

Lots of links here in this followup email to the RISC-V forum from last
week.

And, an announcement for a July Forum.

-Michelle W5NYV

---------- Forwarded message ---------
From: RISC-V International <events at riscv.org>
Date: Wed, Jun 2, 2021, 10:41
Subject: Thank You For Attending RISC-V Forum: Developer Tools & Tool
Chains 2021!
To: <mountain.michelle at gmail.com>

[image: RISCVForums_2021_PromoGraphics_Tools-SchedMobile]

Hello Michelle,

Thank you for attending RISC-V Forum: Developer Tools & Tool Chains
<https://email.linuxfoundation.org/e2t/tc/VVpmRz8xWVqgW1SRx5N4RzDS5W6wcfC_4skNp9N4MwsgD3p_b1V1-WJV7CgHg0W6xxB_655wGDfN39jW6n3L13sW3ddXl92Zp1lDVW_1PX8nmJPKW1Qj8dv3r8vzFW6QVzQv6TLHbQW3h5ctT7fxjyYW7NYsq23phtyPW8MBhMB8d9yQZW6hjj-61Vxd64W6Q6wrr2gv4W2W7BS5Z43hD8cfN3qjQHTwb--JW7CPNg17-2kVQW10PCjz53bGVmN8P6h1B9Cr3KW8FYKFN8z63dLW9hBLSR1MT7tcW3XRdQG3z7hfvW4jtfZJ5JFvj9W8jFWbT1gmh5mN1lRVKH-8s0PW1_y1Gt33_kFtN3MQSxTFxnd6F4_0bRMlm6xW7DZQlw2wKCxLW3Rd0kJ59s2kHW8m5fkV8zfC21W2lcVZN8hqcYvW8Q9-HT3jWK3735GZ1>
!

We hope you enjoyed the event and left with new connections, exciting
ideas, and a better understanding of work happening within RISC-V around
tool chains. We love feedback and your opinion is important to us - please
help us improve future RISC-V events!
*Share Your Feedback >>*
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ATTENDEE RESOURCES
[image: Icons_Slides]
<https://email.linuxfoundation.org/e2t/tc/VVpmRz8xWVqgW1SRx5N4RzDS5W6wcfC_4skNp9N4Mwsdy5nxG7V3Zsc37CgD-pW3Y4w3w6STByRW6KL2-54-cvwhW2tGPG82cdZxsW9dgyXp2D76R5W7VFscs12PwnTW14CfSb2Vh-9YW8Jy3zj2n7Z2YMGKbcCcsSV1W3pq1p36CfqCwW3qdT2P8r3rZsW8CHLZ-2_QMtwW8PmFtv9fQ3_XVFbdH05dF4sQW31W5cm4fRQ8nW7mFKKt70jwH7W3_syr44wY8H9W88k13Z6PJTyXW8RJbfW2KZPvgW3Z73Kx1dY-11N5WcpcgxYJgzW4WDNvm8k-YXmW5JRqN33wjf27W1bf6Vd4DNFvvVgzl6356JWpcVzydn75f691WW7-3qSC44N3vcVc9gPy1V7N13W8mhw2f1rtl_ZW5TFCPK4ffnNyW8Pr80g3f566sW15L-9l6XfqkbW8h5Hb_4XZc0F3cSP1>

Presentation Slides
<https://email.linuxfoundation.org/e2t/tc/VVpmRz8xWVqgW1SRx5N4RzDS5W6wcfC_4skNp9N4Mwsdy5nxG7V3Zsc37CgWmXW6Xpmj18WvyZsW4kPcjL8SHqBFW4FxyTt3vrVxFW1jkKMd6zwZqtW7sXTLy4_gW0BW21mrx11kZN8pW6PTYVQ3yFjSmW4cmWSZ4_GpPfN1pq4rnxQ4TxW8nRxt5112tpTW2XgYnx8jFvbdVTryX884Ltv1W2zbs8R17sNcZW9lQd436g9vxhW2bFy1x7DWk0LW3m1H5C1qgv-nW9kxm216GPM_vW4HCQv71c30X-W3xxtVM1cTFLTW4V6G1k41lRRzW5P7jgv8xTpNDW4x31MG6fCfMgV-b0bD3LvgcWW56wYTT2FGh2JW8T7l0k3kfnPFW56Mtdt4RNmN5W3-lv6V6qFkNRW66T96Z1Q6cB5W37M2921cdgmRW5qZnKL3JCHmYW5xhb-71XQ6N8N2N9CPPs8PYT3fxM1>

PDF versions are found on Sched.com. Note some may not be available upon the
speaker’s request.
[image: Icons_Youtube]
<https://email.linuxfoundation.org/e2t/tc/VVpmRz8xWVqgW1SRx5N4RzDS5W6wcfC_4skNp9N4Mwsgk3p_9LV1-WJV7CgH_4W3bJ79w8vFTSPVbFHGf43wF11W5hzx3g77sx-kW3Q_qS-4sNqDFW2Rqtx83t0CF7Vvy8fs4yHq_jVsr8vW6z9BGsW5Dc0YD4yfvX5W83lYbc70Nwl4N6_gd9ykhXttW6wbxF44JdjCwW9lmWgH1QvGMFW3k483m4vHY1RW3SbGNM8BPjnLW2LHVB_7__NS2W2-DgCt5_hgx_W4kPl6r3RwzBnW7PLRh_9d0jvkW97678s2pd2p0W3NHl9t4tnSKNN5mVgYWNz1d5W8qWRS25VWCbzW8kM8Qt64GsvfW6TdBJD2v7T8dVzMkNc8Gx3DnW3qmwdq70CB-mW6360NN58GKy7W6FXBHP2vfwmc3hBJ1>

Session Videos
<https://email.linuxfoundation.org/e2t/tc/VVpmRz8xWVqgW1SRx5N4RzDS5W6wcfC_4skNp9N4Mwsgk3p_9LV1-WJV7CgCd2Mv1Wc6B0QQTW76DVPd5Xw3h3W4p9t2v6vRKkSN2Lj249637FGW6b4p96907V5QW1hrpqs8Ng3GbW2YYLqh4BMnZZW4g1H6466J_1XN5drdLXtMsnsN6_rpr0TH9QTW8SGF2Y3tVCtBW3cppmW5mpK_YW2HN5Y82zPV94W13bjwL8GLnLrW3Y0vlc4C52kTW7vLCMc61q510W41xLkW2HbWC3VcMWn11CsFXsW5VvzvJ17CbRRW8tSMc83ZF_BCN7HhGDtSfYTwW3wY8yg2tktWpW6DGLmD2zJLdHW3dpcx_5YR49MW46jNCZ335MtlW6jYGpB8HCMsqW1DKs513yCfysW54rsZl6L56BP38Vz1>

Sessions were recorded and will be available on the RISC-V YouTube Channel
in the coming days.
Find more information and get involved!

   - Review the Getting Started / Overview for RISC-V technical developers.
   <https://email.linuxfoundation.org/e2t/tc/VVpmRz8xWVqgW1SRx5N4RzDS5W6wcfC_4skNp9N4Mwsdy5nxG7V3Zsc37CgCXBN7lj4c1TZB74VP7HDr6_ZWNMW8_R1_g1qMkC6W8GwK7K2Y7DlYW7XWY-17SWn8tW5qw3qy92ZDPYW1VqWKp5-7bXHVS6hYp2JsnwtV5CcTn6wRmH7N3l6qJfVBy3VW2nfl3l32fr0TV3ltNz93n3pGW8NKpNP72QXMdN4H-QtPt8JLvW1sSDwg2drXJdW187ctK8Py5svW5FjVg16bFT1HW7ZZl7m1z3ScBW6flzBc4wnd5yW2ZjFpP5ylqMZW5NNJz819BwmYVVMys07fdFTRW69PyXY8-B_VrW88gwhY5ZV0gpVwyDmT67tSkVW31Lv9L8cC-rsW69fwS87wvPtRW49sqxV4S9yrhW1H0VXp1l7f7jN5vZfk--5YpyW6vv7w44TZbH0W3Ddfg586QKHY35z41>
   - Check out the RISC-V Tech Wiki.
   <https://email.linuxfoundation.org/e2t/tc/VVpmRz8xWVqgW1SRx5N4RzDS5W6wcfC_4skNp9N4MwsfL3p_97V1-WJV7CgM_-W7YG7sm3T69lWW84nvZX9br-hWW7MKXfS8r6yPRW6n9hHY24MBTnW8x4vss1-DFl0W2DL3b96L1xgSW7Fz0022vK0RzW7CPb923xD3QCVrwn7l8X0Z2VW802Tts5yYKQXW14_tyD5Q4vSnW5LG3pF8SdkYMW28DK_v6YLx4tN75fLjMWF2N1W55f4NY6nyn_MW82GyPS5ZzM0CW3xn5FG1PHy8sW12TpwG1H44YgW1h-mPC24ZgLdW6ryG8z5S7jLbW7jXZcT1y9LxVW80cBDW2rpl7zW55p0_p1MfpbrW5Yhkfl6ZpzM22pK1>
   - Join the community and get involved by signing up for a RISC-V group.
   <https://email.linuxfoundation.org/e2t/tc/VVpmRz8xWVqgW1SRx5N4RzDS5W6wcfC_4skNp9N4Mwsg13p_9rV1-WJV7CgPLDW22FXxW3KsMmTW1nSlTg8-tFyhW8Nhm719b8pdYW3MMW8S2kdHfSW8wpS0P1qSVlBN5zcg4tMwxVxW1zP_Th9j8ZpYN1XzSc622G7FN30-fkpJw4dzW2J9KWc3z_6jqW5WYBXC8rctSfW7W6W7D6vS53bW3hn2fZ2fsL31VGgDLm2mK0SWW4kBRFS5ZZsd6W1ySML23k1NdVW8CVhXk81mWZyW5P39Wv9gdstqW13Zdkp63v18fW8L4FmG79WnKGMWQKqk9nt_lW8RB7QM9hvqdjW3dkSNj7ZDMX6W6kbC897J_r2_W3K-zXJ29hLRzW7M5Sm226xJ7Z32851>

CONNECT WITH US

Post and Follow our official event Hashtag

*#RISCVForum*
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We hope to see you at RISC-V Forum: Embedding Technologies
<https://email.linuxfoundation.org/e2t/tc/VVpmRz8xWVqgW1SRx5N4RzDS5W6wcfC_4skNp9N4MwsgD3p_b1V1-WJV7CgMktW8Lt5rs5ySGMtW9bmgS27dxZG_W2wrMc-4y4kGMW3N1GQ18gRV7hW1R44Xd4-cNRbW87L2Br8tFGsCW2DmyDN81gCcbW90PJs87-NZYQW5tVy2y7GXtgfW6PrxVk8Hf7QfW8FZJcZ4M9TNYW19jj9t6xr2jFW2QzJCl6NYCjDVztbpm3LgPX8W8MpK7J7xt0hcW1_KjGg8WXdSWVfXySd7p2J4LW2rXKBj4t5LL4N4dGYYcGDDqsW5gw8dl1YXBhTW1DYWjK6Lj_hxW2bS6fV94w-BTW6TBJ5Z1dV80JW2KZJbq8xpCT_N3BLWmgSn5k6V9hGPd1_2z4FW7cYCpc5fMgG9W2qRb-D949npsN5bm65gZ3CzSW4CnDpM8Yg6KM3j531>
taking place Wednesday, July 21 - Register Now
<https://email.linuxfoundation.org/e2t/tc/VVpmRz8xWVqgW1SRx5N4RzDS5W6wcfC_4skNp9N4Mwsf75nxGLV3Zsc37CgVF2W1Fqz7_1xNL4BW7yJlNR8NS22KW34MTYk1vg_ZLN8_Wb9vzxRMFW5S6pV161bL81W1xblxm8d3TTbVBP7Tr2XqzJTW1MQMqp91NbGSW8HGRj42LN36qW3DVzZP1WjjtmVFJTvj68S_M-W427tdV91ZK8XW2GqkQF5KLqYHW4-VnlF7mM2ZNMD7Qv5kxl-FW7DPgFj25_tgLVXzLBD83qR9bW3hhTdT93xhq_N2XQVgt3JBYTW644fXw3ftqRYW3Y2_Qv1ZHXTLW6J10b284lRFsW6vvN3C2dk87fW5c_QDl2SnPxwW6SQ54-2WyPpkW91WvBW6K8n2tW3VbvBk6mzGKpW2xxQ-k4Rx3JNN4jpbdprDcP6W40c8WB5RT8GbW5c9dGT1sndmhW2phKPS8TCDQDW3JzxWw7ytlVQW8wWhX15g1mFtW1fDJ-24217g8W732dd96V8qLV36_Q1>!
And don’t forget to submit to the CFP
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by June 11.

Sincerely,

The RISC-V Events Team
*THANK YOU TO OUR SPONSOR*
[image: Andes]
<https://email.linuxfoundation.org/e2t/tc/VVpmRz8xWVqgW1SRx5N4RzDS5W6wcfC_4skNp9N4Mwsg13p_9rV1-WJV7CgFTsW4FZ6LT7bKfDwVG1g1F5WKqDyW476Dk34bX0KCW1_Wkxw6BQbqvW2cm40S5b6GJ0W3VcRNV5sQLT5W4NGSBM8jl2QyN5Wmrdy8xVjBW7CpCs395rKbLW827CDG7ZlcjnW66SRqh8wK0pZW1-4XMJ30pXxwW56r3Xx2KXwxXW1PF_jy8XcrfCW6G69p76jHT8zW22KdK-7W_50vN39CbLn66nM1VGwdrw8rX7BSVmy4jm7F8GynMymLDL3JWnvW8X8Yjk8NSj_FW7gHRlr1gK100V4r1g05DcX-tW8gcmxx7nYc0fW7Pb-Bd8PbkynW8y6xtM69fDp53pD31>

It was a pleasure hosting you at RISC-V Forums: Developer Tools & Tool
Chains, which included an insightful session *“Linker Relaxation in LLD”*
by Chih-Mao Chen, Toolchain Engineer at Andes Technology, where he develops
RISC-V toolchain based on the LLVM compiler infrastructure.

Linker relaxation is an important link-time optimization in RISC-V. By
marking code sequences with relaxation hints and rewriting them with
shorter ones at link time when the final addresses are known, the linker
can create smaller and more efficient programs. However, such optimization
isn't available in LLD (LLVM's linker), leading to larger programs and
compatibility issues with other toolchains that assume relaxation.

Chih-Mao gave a brief overview on how linker relaxation works in RISC-V and
discussed relaxation implementation and alignment handling in LLD as well
as benchmarking results after enabling relaxation.

As Founding Premier member of RISC-V International, Andes is the leading
supplier of high-performance/low-power embedded processor IP solutions. Its
V5 RISC-V CPU families range from tiny 32-bit cores to advanced 64-bit
cores with DSP, FPU, Vector, Linux, superscalar and multicore capabilities.

Follow Andes on Twitter
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, LinkedIn
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, YouTube
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and visit our website
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to learn more about how Andes can help you innovate SoCs in a shorter time
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