[Ground-station] Ground-Station Digest, Vol 27, Issue 9

Thu Jun 18 09:46:37 PDT 2020

Hi,

I have had another look through and had a number of thoughts, some may be
useful, others maybe not.

Listed in order that appeared in document, not necessarily by importance:

*Specific Items*
1.2 - p4. "adapts to digital subsystem failures"
What about analogue (power) and RF faults?  Could be even more critical
than digital sub-system failure

1.3 - p8.
The RAM is indicated as volatile, however if FRAM is used - which is a
sound choice for this application - it is non-volatile

1.4 - p8.
How is FPGA/SoC instruction storage managed? Will there be EEC on the data
in the PROM(s)?

1.5 - p8.
There is no filter after the MMIC amplifier.  I suspect the non-linearities
will violate the CCSDS spectral masks and we should consider a filter here.

1.6 - p8.
How is the Rx-Tx isolation achieved on the UHF channels? Strictly
half-duplex or some frequency separation?

1.7 - p9.
What is the purpose of the UHF transponder loopback - added functionality
or backup system?  If backup system, how is the fault condition detected?

1.8 - p10.
The diagram seems to indicate that the processor interfaces with the SDR
ADC and DAC ("SDR ADC/DAC Thread").  I would've expected the FPGA logic to
interface to the data convertors.

1.9 - p10.
Assuming this is a Zynq device there are anywhere between 2 - 6
processors.  May be interesting to think about how the threads are
segmented between processors. For example the safety thread running on two
R-5s in lockstep.

1.10 - p10.
I see the C-band BB is routed to the TT&C processor. Does the processor
have the capability to deal with the bandwidth of this analogue signal? Is
an analogue channel pre-selector required?

1.11 - p13.
The failover from FPGA to transponder is specified as controlled by a state
machine (presumably inside the TT&C controller).  A more reliable approach
would be to do this in hardware, an AC coupled BJT buffer and a high time
constant filter fed to comparator is drastically lower risk from hardware
failure and removes the complexity of FSM inside a controller (or more
specifically the thread switching of the FSM and everything else) - getting
the coding wrong of these mission critical FSMs is probably the bigger risk
(see KickSat as an example).

*General Items  *
2.1
Do you know anything about local interference (other systems on Gateway)
and the required out-of-band rejection on UHF/C band receive?  Is a filter
required to stop the LNA saturating?  Is there a band plan/frequency list
for the mission yet?

2.2
There is no information about the antennas even though they are quite
important, are they covered by a different document?
How will the antenna spatial switching be implemented?

2.3
Will over-the-air updates of the SDR be supported? If so, how are the
backup, primary, secondary images managed?

2.4
The camera interface is not mentioned.  I'm guessing this will be something
like a LVDS/MIPI interface to the SDR board?

2.5
There's no real numbers anywhere.  Since the architecture should be driven
by quantitative factors (I'm a big believer of Akin's 1st law of spacecraft
design) in my opinion these (estimated) numbers would be informative to
justify the architectural decisions:
  - X/C/UHF bandwidth / symbol rate
  - Number of channels
  - Transmit power
  - Antenna gains
  - System power usage
  - Volume
I suspect many people close to the project instinctively know the order of
magnitude numbers, but as a stand alone document, it's not mentioned.
Could reference to system requirements if you wanted to limit this document
purely to architecture.

2.6
There's no explicit mention of design for radiation.  TID is not really a
problem due to mission length but SEE is certainly of interest -
particularly latch up.

Cheers,
Thomas

On Wed, 17 Jun 2020 at 20:09,
<ground-station-request at lists.openresearch.institute> wrote:

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>    1. System Architecture (17 June 2020) - Review Request
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> Date: Wed, 17 Jun 2020 11:08:48 -0700
> From: Michelle Thompson <mountain.michelle at gmail.com>
> To: Michelle Thompson via Ground-Station
>         <ground-station at lists.openresearch.institute>
> Subject: [Ground-station] System Architecture (17 June 2020) - Review
>         Request
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> Attached is today's cut of the System Architecture document for AREx. This
> is also our baseline design.
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> We have a significant milestone coming up in the 25 June 2020 hardware
> meeting for AREx.
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> I need this document to be as good as it can be by then.
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> Please review. All comment and critique welcome and encouraged.
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> -Michelle W5NYV
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