[Ground-station] Satellite program

Douglas Quagliana dquagliana at gmail.com
Thu May 17 08:52:28 PDT 2018


Resending because the previous message with all the quoted text was too long for the mailer. 

Regards,
Douglas

> On May 17, 2018, at 10:05 AM, Douglas Quagliana <dquagliana at gmail.com> wrote:
> 
> I don't know what drove the design decisions. The 2-of-3 voting has the advantage for simplicity and it's easy to implement. In fact, they tested it initially by just not soldering in one of the three banks of memory!
> 
> It also has the advantage that for any 32 bit chunk of memory it can correct up to 32 bit errors (that is, ALL of them could have bit errors in one of the banks and it will be corrected), which is better than many other parity schemes which limit the number of detectable/correctable errors per chunk of memory. 
> 
> Regards,
> Douglas
> 
>> On May 17, 2018, at 6:29 AM, Bruce Perens <bruce at perens.com> wrote:
>> 
>> Thanks Doug. Wow. Was an ECC chip and extra bits considered less reliable?
>> 
>>> On Thu, May 17, 2018 at 12:02 AM, Douglas Quagliana <dquagliana at gmail.com> wrote:
>>> All,
>>> 
>>> Here's more way more information than you wanted to know on a couple of the points that Bruce mentioned.
>>> 
>>> Bruce writes:
>>> >They didn't always use rad-hard memory, just because they could not afford it, 
>>> >but used error-correcting memory architectures and scrubbed the memory constantly 
>>> >so that single-bit errors were corrected before they became large enough to be 
>>> >uncorrectible. 
>>> 
>>> If I recall correctly, the memory scrubbing technique was used on the LEO Microsats and a three bank memory voting scheme was used on the IHU-2 on AO-40.  See
>>> 
>>> http://www.amsat.org/amsat/articles/g3ruh/124.html
>>> 
>>> >EDAC memory: 20 percent. The EDAC (Error Detecting And Correcting) memory scheme used requires the actual memory to be three times as large as the processor sees. This is necessary to allow a two-of-three vote for each bit. 
>>> >This scheme results in a much faster memory system than the Hamming 12 to 8 EDAC system used on previous designs, in order to support the much faster processor. 
>>> 
>>> 
>>> Bruce writes:
>>> >They have their own FORTH-like language, first written in the '70's, which 
>>> >does concurrent but not parallel threads.  Most housekeeping is written 
>>> >in this language.
>>> 
>>> The language is IPS.  First described in 1979! The original reference is
>>> 
>>> Meinzer K.; IPS, An Unorthodox High Level Language, BYTE, January 1979, pps 146-159.
>>> 
>>> which, before you groan about ancient references to out-of-print paper magazines, is actually available online at
>>> 
>>> https://archive.org/stream/byte-magazine-1979-01/1979_01_BYTE_04-01_Life_Algorithms#page/n147/mode/2up
>>> 
>>> But...if you want to learn IPS then you probably want the IPS book that James Miller, G3RUH, first published in 1997.  Before you groan, again, about ancient references to out-of-print paper books, that book (actually the third edition of that book from 2016) is available online at 
>>> 
>>> http://www.jrmiller.demon.co.uk/IPS/IPS.pdf
>>> 
>>> However, as you will quickly find out reading Miller's IPS book, the AO-13 IPS flight code is written in a German variant of IPS, so a lot of that IPS code looks like this:
>>> 
>>> : TRQ-ST Z-MARKE @
>>>     JA? E-FLAGS @ #14 UND >0  Z @
>>>         MZEITGRENZE @ = ODER
>>>         JA? 0 M-EIN !
>>>         DANN Z @B 32 + #FF UND 64 < M-EIN @
>>>              UND 1 UND MAGNET !B
>>>     DANN ;
>>>     
>>> which to some people looks a lot like line noise but here "JA" is "YES" and "DANN" is "THEN" and so on in German (hint: There is an "English/German cheat sheet" in the IPS book on page 82).  If you wrote your own IPS code today you could use the English ones, but to read the old housekeeping code you need to be able to look up the equivalents in English AND understand the low level machine operations (such as byte addressing, a stack, bitwise operations...  remember this language was designed and meant to be run (originally) on an 1802 or an 8080 or a 6502 with maybe thirty-two KILObytes of memory.  Yes, KILO-bytes of memory.  Really.  I'm not making this up. Go read the IPS book.)
>>> 
>>> Emulators/simulators for running IPS code (German and English) are on the AMSAT website if you want to start coding. See
>>> 
>>> http://www.amsat.org/amsat-new/tools/softwareArchive.php#pc-ips
>>> 
>>> Lastly, if you feel you must have a real 1802 CPU, well, there actually are 1802 CPU chips still around (well, regular ones not the SoS rad-hard ones), and there is even an entire 1802 computer that you can buy as a kit complete with toggle switches, LEDs, and up to 64K of RAM.  And it fits inside an Altoids tin!  No, I'm not making this up either. See
>>> 
>>> http://www.sunrise-ev.com/membershipcard.htm
>>> 
>>> Note that the membership card 1802 CPUs are not rad-hard and they can run TinyBasic not IPS. But, I'm sure AMSAT still has at least one rad-hard 1802 CPU... somewhere. And, getting IPS to run on the 1802 membership card is left as an exercise to the reader.  If you're successful, I'd love to hear about it.  
>>> 
>>> 73,
>>> Douglas KA2UPW/5
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